A frequency synthesizer comprises an electronic system which generates at its output a higher frequency signal(s) from the lower frequency signal provided a single fixed timebase or master oscillator. A common way to implement a frequency synthesizer is with a phase-locked loop (PLL).
A PLL is a feedback control system that includes an error detector (comprising a phase frequency detector coupled to a charge pump) which compares the phases of two input signals (reference signal and frequency divided higher frequency output signal) to produce an error signal that is proportional to the difference between their phases. The error signal is then low pass filtered and used to drive a voltage-controlled oscillator (VCO) which creates a higher output frequency. The output frequency is fed back through a frequency divider to the input of the phase frequency detector, producing a negative feedback loop. If the output frequency drifts, the phase error signal will increase, driving the frequency in the opposite direction so as to reduce the frequency error. Thus the output is locked to the frequency at the other (reference) input of the error detector. This reference input is usually derived from a crystal oscillator, which is very stable in frequency.
One application for frequency synthesizers is for enabling flexible and cost effective implementation of frequency modulated continuous wave (FMCW) radar systems. Automotive radar systems generally use such synthesizers to generate a continuous wave (CW) of constant or time-varying frequency. The most common usage is a linear ramp in frequency (vs. time), commonly called “chirp”. For such applications the clock frequency utilized is generally ≥5 GHz.
Any significant deviation from the desired frequency ramp results in a performance degradation which can lead to incorrect estimation of a target's position and/or velocity, inability to separate close targets, or detection of “ghost” targets. Since the user's safety is critical in automotive applications, it is important to continually monitor the frequency error of the frequency synthesizer's output in a continuous wave (CW) manner.
Due to the high clock output frequency generated by frequency synthesizers, to monitor the frequency error of the clock output it is generally necessary to down-sample the clock signal to a lower frequency. After down-sampling, known solutions for monitoring the frequency error of the clock output digitize the down sampled signal, extract the phases, and then differentiate the phases to generate an estimation of the instantaneous or average frequency of the clock output (estimated clock frequency). In addition, measuring the linearity of the synthesizer's output CW from the estimated clock frequency while it is ramping in frequency is typically performed off-line using external equipment.